Amorphous silicon memory
US5360981A · kind A · utility
300Cited by
3References
11Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Feb 22, 1994 |
| Grant date | Nov 1, 1994 |
| Priority date | — |
| Expiry date | Feb 22, 2014 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10S438/90
Abstract
An analogue memory device comprises a layer of doped amorphous silicon located between a first conducting layer metal contact layer of V, Co, Ni, Pd, Fe or Mn. It has been found that the selection of one of these metals as the contact exerts a significant effect on the properties of the device, e.g. the selection of Al, Au or Cu gives no switching whereas Cr, W, Ag give digital instead of analogue switching.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.