TTL-CMOS output stage for an integrated circuit
US5361004A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Jan 21, 1993 |
| Grant date | Nov 1, 1994 |
| Priority date | — |
| Expiry date | Jan 21, 2013 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K19/017518
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A TTL-CMOS output stage for an integrated circuit includes a bipolar transistor and a MOS transistor series connected between the power supply and ground, their common point forming the output terminal of the TTL-CMOS output stage. A first switching control input channel includes an inverter whose input forms the input terminal of the stage and whose output is connected to the gate of the MOS transistor via a resistor. A second switching control input channel includes a second inverter controlled by the first inverter and whose output is connected to the base of the bipolar transistor by means of a second resistor. The resistors make it possible to limit the transient current and the mean current supplied by the bipolar transistor.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.