Debug circuit of a signal processor
US5361348A · kind A · utility
19Cited by
7References
6Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Jul 23, 1993 |
| Grant date | Nov 1, 1994 |
| Priority date | — |
| Expiry date | Jul 23, 2013 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F11/3656
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A debug program is decoded in a command decoder to generate a debug start signal. Then, a signal processing operation is halted and a state of an internal circuit is latched and read to be supplied to an external circuit. When the reading of the state starts, a signal-processing continuation signal is generated, so that the signal processing operation is restored to be continued. Therefore, the debug program can be inserted to a program memory at plural addresses without braking the signal processing operation.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.