Digital peak-threshold tracking method and apparatus
US5363100A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Jun 30, 1993 |
| Grant date | Nov 8, 1994 |
| Priority date | — |
| Expiry date | Jun 30, 2013 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K5/1532
- WIPO fieldMeasurement
- WIPO sectorInstruments
Abstract
A peak-detection threshold circuit for digitally adjusting an analog peak-threshold level in a magnetic storage read channel. A digital scheme is used to monitor both the positive (PX) and negative (NX) peaks detected in an analog signal. For both positive and negative thresholds T.sub.P and T.sub.N, intermediate peak thresholds T.sub.M are established at selectably lower levels than the peak-detection threshold T.sub.P /T.sub.N. Analog signal peaks are detected when the analog signal crosses the intermediate peak threshold T.sub.M. The corresponding peak-detection threshold T.sub.P /T.sub.N is then compared to the analog peak amplitude. If the intermediate peak threshold T.sub.M and the corresponding peak threshold T.sub.P /T.sub.N are both exceeded by the analog signal, a digital "increment" error flag bit is generated. If only the intermediate peak threshold T.sub.M is exceeded by the analog signal, a digital "decrement" error flag bit is generated. No error is generated unless the signal exceeds the intermediate peak threshold T.sub.M. The increment and decrement error flags are stored sequentially in an error flag history register, which is evaluated to select a digital "added…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.