Circuit for driving two power mosfets in a half-bridge configuration
US5365118A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Jun 4, 1992 |
| Grant date | Nov 15, 1994 |
| Priority date | — |
| Expiry date | Jun 4, 2012 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K17/6871
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A driver circuit for driving top and bottom power transistors stacked between two supply terminals is provided. The driver circuit includes shoot-through reduction means for monitoring the gate-to-source voltages of the two power transistors so as to inhibit the turning-ON of each power transistor until the gate-to-source voltage of the other power transistor has fallen to a voltage level indicative of the other transistor being OFF. Additionally, the driver circuit which can utilize a bootstrap capacitor for providing enhanced voltages to drive the top power transistor, also includes a bootstrap capacitor recharge means to monitor the output voltage of the circuit so as to inhibit the turning-ON of the top power transistor until the bootstrap capacitor has had sufficient time to recharge.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.