Method for producing CMOS transistor
US5366922A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Nov 22, 1993 |
| Grant date | Nov 22, 1994 |
| Priority date | — |
| Expiry date | Nov 22, 2013 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10S148/034
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
The method of producing a CMOS transistor device. A pair of device regions are formed in separated relation from each other by a field oxide film on a pair of corresponding well regions formed in a semiconductor substrate. A gate insulating film and a gate electrode is sequentially formed on each of the device regions. The gate insulating film is removed through a mask of the patterned gate electrode to expose a silicon active surface at least in one of the device regions. A diborane gas containing P type impurity of boron is applied to the silicon active surface to form thereon a boron absorption film. N type impurity of arsenic is doped into the other device region by ion implantation to form N type of source and drain regions while masking the one device region. The boron is diffused from the adsorption film into the one device region to form P type of source and drain regions by annealing of the substrate.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.