Compound semiconductor device for reducing the influence of resistance anisotropy on operating characteristics thereof
US5367182A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Mar 24, 1993 |
| Grant date | Nov 22, 1994 |
| Priority date | — |
| Expiry date | Mar 24, 2013 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D62/824
Abstract
A compound semiconductor device including a semiconductor substrate having (100) plane as a crystal growth plane, a first semiconductor layer as an electron traveling layer and a second semiconductor layer for supplying electrons to the electron traveling layer. The first semiconductor layer is formed on the semiconductor substrate and has a different lattice constant from the semiconductor substrate so that a first strain is applied in the first semiconductor layer in a first strain direction. The second semiconductor layer is formed on the first semiconductor layer and has a different lattice constant from the first semiconductor layer to thereby apply a second strain to the second semiconductor layer. The second strain has a direction that is inverse to the first strain direction. In addition, the thickness of the semiconductor layer is defined so as to compensate for the first strain applied to the first semiconductor layer by the second strain applied to the second semiconductor.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.