Microchip assembly with electrical element in sealed cavity
US5367194A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Apr 23, 1992 |
| Grant date | Nov 22, 1994 |
| Priority date | — |
| Expiry date | Apr 23, 2012 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/0002
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method of producing a microchip having at least a portion of an electrical circuit element contained within a hermetically sealed enclosure comprising the steps of: forming a cavity in a first substrate assembly which has a cavity opening at a first surface portion of the first substrate assembly; forming an electrical circuit element and sealing ring from a film applied to a first surface portion of a second substrate assembly with the sealing ring arranged in circumscribing relationship with at least a portion of the circuit element; positioning the first surface portion of the first substrate assembly opposite the first surface portion of the second substrate assembly with the sealing ring located in circumscribing relationship with the cavity opening; sealingly bonding the sealing ring to the first surface portion of the first substrate assembly.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.