Semiconductor integrated circuit device and test method therefor
US5367263A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Dec 29, 1992 |
| Grant date | Nov 22, 1994 |
| Priority date | — |
| Expiry date | Dec 29, 2012 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C29/56
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A semiconductor integrated circuit device includes individual circuit blocks which are tested according to the method of the invention. Circuit blocks of a semiconductor integrated circuit device may be tested independently of one another until all circuit blocks have been tested, or alternatively may be simultaneously tested. The multi-test method of the invention simultaneously tests plural semiconductor integrated circuit devices by successively testing corresponding circuit blocks on each semiconductor integrated circuit device. The test apparatus of the present invention is of minimal size and complexity, and greatly enhances testability of a semiconductor integrated circuit device.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.