Line buffer for cache memory
US5367660A · kind A · utility
55Cited by
8References
12Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | May 11, 1994 |
| Grant date | Nov 22, 1994 |
| Priority date | — |
| Expiry date | May 11, 2014 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F12/0859
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
An improved cache memory for use with a microprocessor. A line buffer which stores a tag and offset field and the corresponding line of data is employed. Valid bits are associated with different potions of the data stored in the line buffer. Thus during a line fill, by way of example, an instruction may be read from the line buffer before the entire line is filled from main memory.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.