Digital/analog converter circuit utilizing compensation circuitry
US5369402A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Dec 23, 1993 |
| Grant date | Nov 29, 1994 |
| Priority date | — |
| Expiry date | Dec 23, 2013 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03M1/742
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A digital/analog converter circuit comprising first to third transistors, the first transistor having a gate terminal for inputting a constant voltage and one side terminal for inputting a power source voltage, the second transistor having a gate terminal for inputting a first digital signal, one side terminal connected to the other side terminal of the first transistor and the other side terminal forming a first output terminal, the third transistor having a gate terminal for inputting a second digital signal of the opposite phase to that of the first digital signal, one side terminal connected to the other side terminal of the first transistor and the other side terminal forming a second output terminal. A buffer part buffers a digital input signal to provide the second digital signal. An inverter part inverts the digital input signal to provide the first digital signal. The inverter part includes a first compensator for removing an input transfer time difference between the second and third transistors in response to the output of the buffer part. A second compensator removes floating electrons from the inverter part in response to the digital input signal. A third compensator c…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.