Method and apparatus to test for current in an integrated circuit
US5371457A · kind A · utility
Inventor
Key dates
| Filing date | Apr 2, 1991 |
| Grant date | Dec 6, 1994 |
| Priority date | — |
| Expiry date | Apr 2, 2011 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG01R31/3004
- WIPO fieldMeasurement
- WIPO sectorInstruments
Abstract
Various methods and apparatus perform IDDQ testing using the input and output circuits typically associated with input and output pads of an integrated circuit. Under these methods, the number of tester channels and external circuit elements required for IDDQ measurements is minimized. In one embodiment, the IDDQ current is measured by sensing the voltage at either an input pad or an output pad. In another embodiment, an internal pull-up transistor of known resistance is used for current sensing. In another embodiment, a method and apparatus for performing IDDQ testing quickly are provided by disconnecting the primary power or ground bus line connections from the tester and using alternate connections to provide power to the circuit under test over the duration of the IDDQ testing.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.