Method for reducing errors in a digitizer
US5373117A · kind A · utility
6Cited by
15References
5Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Aug 10, 1992 |
| Grant date | Dec 13, 1994 |
| Priority date | — |
| Expiry date | Aug 10, 2012 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F3/0418
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method for reducing errors in electrographic digitizer systems where the horizontal and vertical coordinates are quantized at various time intervals. The method minimizes the time skew generated during quantizations and doubles the quantized coordinate pair output rate by utilizing a time-weighted linear interpolation.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.