MOSFET with sidewall spacer on gate section
US5373178A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Jul 26, 1993 |
| Grant date | Dec 13, 1994 |
| Priority date | — |
| Expiry date | Jul 26, 2013 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10S257/90
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
After forming a low concentration impurity layer by ion implanting an impurity into a semiconductor substrate 1 by using a gate electrode 7 on the semiconductor substrate 1 as a mask, side walls composed of films having a large etching resistivity with respect to an interlayer dielectric film 13 are formed on side surfaces of the gate electrode 7 and a gate oxide film 6 located beneath the gate electrode 7. Subsequently, the interlayer dielectric film 13 is formed over the whole surface, and a contact hole 18 having a part of side walls constituted by the first-mentioned side walls 8 and a field oxide film 2 is formed. A high concentration impurity layer is formed by implanting an impurity through the contact hole 18.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.