Interlaced to non-interlaced scan converter with reduced buffer memory
US5373323A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Nov 1, 1993 |
| Grant date | Dec 13, 1994 |
| Priority date | — |
| Expiry date | Nov 1, 2013 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG09G2310/0229
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
A data converter for converting interlaced image data into a non-interlaced format is disclosed. The converter comprises a buffer memory capable of storing upto N such scan lines of the interlaced image data for performing, per input pixel clock pulse, a read and then a write operation, wherein the N represents the number of scan lines per field; a horizontal address generator for, upon receiving each of input pixel clock pulses, generating a horizontal address by sequentially counting the number of pixel clock pulses received after each of input H/SYNC pulses received; and a vertical address generator for generating, upon receiving each of the input H/SYNC pulses, generating one of a series of vertical addresses for outputting the interlaced image data in the non-interlaced format.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.