Semiconductor device in which the number of word lines selected simultaneously in a refresh mode is externally selectable and method of manufacturing the same
US5373475A · kind A · utility
38Cited by
9References
13Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Aug 6, 1992 |
| Grant date | Dec 13, 1994 |
| Priority date | — |
| Expiry date | Aug 6, 2012 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C11/406
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A refresh mode switching signal generating circuit generates a refresh mode switching signal of an H level or an L level depending on whether a particular bonding pad is wire-bonded to a power supply terminal of a package. In response to the refresh mode switching signal, the refresh mode switching circuit switches a cycle number in a refresh mode of a semiconductor memory device, so that the cycle number in a refresh mode can be changed according to requirements of users.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.