VCO bias generator in a phase lock loop
US5375148A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Mar 1, 1993 |
| Grant date | Dec 20, 1994 |
| Priority date | — |
| Expiry date | Mar 1, 2013 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03L2207/06
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A bias voltage for a VCO is generated by monitoring UP and DOWN control signals from a charge pump and generating first and second output signals upon detecting a predetermined number of consecutive UP pulses or DOWN pulses. The first output signal causes a shift register pre-loaded with a data pattern having one odd logic state to shift one bit location to left, while the second output signal moves the odd logic state one bit location to the right. The bias voltage to the VCO is selected based on the odd logic state bit location. Any variation in VCO output frequency due to intermittent ground bounce is eliminated by requiring a consecutive number of UP pulses or DOWN pulses before moving the VCO bias point.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.