Integrated circuit package for flexible computer system alternative architectures
US5376825A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Nov 18, 1993 |
| Grant date | Dec 27, 1994 |
| Priority date | — |
| Expiry date | Nov 18, 2013 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/30105
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A single-packaged central processing unit (CPU) is formed on a substrate for a particular application in a variable word length computer system that includes a program memory. A first semiconductor chip in the CPU is of a general purpose type and includes a plurality of elements interconnected, such as an arithmetic logic unit (ALU), a program counter, and a register. A second semiconductor chip in the CPU is mounted on the first semiconductor chip with their active surfaces facing each other. The second semiconductor chip is configured for the particular application in accordance with a particular program instruction set stored in the program memory. The second semiconductor chip includes a command register for receiving fetched commands from the program memory, a command decoder for decoding the fetched commands and for generating corresponding control signals, and a timing generator for generating system clock signals. In one embodiment, the command register has a particular bit length for adapting to the particular application. In another embodiment, the command decoder has a particular bit length and the timing generator is configured to generate particular corresponding contr…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.