Method and apparatus for positioning an integrated circuit device in a test fixture
US5376882A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Sep 16, 1992 |
| Grant date | Dec 27, 1994 |
| Priority date | — |
| Expiry date | Sep 16, 2012 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG01R31/2886
- WIPO fieldMeasurement
- WIPO sectorInstruments
Abstract
A method and an apparatus are disclosed for positioning an integrated circuit chip to be tested on a device-under-test ("DUT") interface board without using a hold-down plate and for attaching this interface board to a feed-through interface module so that the device being tested makes abutting contact with the feed-through interface module and so that the contact pins of the device being tested make abutting electrical contact with contact pin sockets on the DUT interface board. This arrangement provides a path for heat and ion dissipation from the chip being tested in a simple and elegant manner which also minimizes potential damage to the chip.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.