Technique for providing improved signal integrity on computer systems interface buses
US5377328A · kind A · utility
6Cited by
16References
10Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Jun 5, 1991 |
| Grant date | Dec 27, 1994 |
| Priority date | — |
| Expiry date | Jun 5, 2011 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F13/4045
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
An interface system for transmitting a pulse waveform signal between a host computer and a plurality of peripheral units wherein such signal is transmitted on a dedicated bus, the peripheral units being connected to the bus in selected groups thereof. Each group has a buffer unit connected between the group of units and the host unit, the buffer unit including circuitry for providing signal transmission in only one direction, for controlling the final signal level of the signal, and for controlling the slope of the trailing edge of the signal so that signal degradation is minimized.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.