Method of making a silicon carbide junction field effect transistor device for high temperature applications
US5378642A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Apr 19, 1993 |
| Grant date | Jan 3, 1995 |
| Priority date | — |
| Expiry date | Apr 19, 2013 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10S438/931
Abstract
A silicon carbide (SiC) junction field effect transistor (JFET) device is fabricated upon a substrate layer, such as a p type conductivity SiC substrate, using ion implantation for the source and drain areas. A SiC p type conductivity layer is epitaxially grown on the substrate. A SiC n type conductivity layer is formed by ion implantation or epitaxial deposition upon the p type layer. The contacting surfaces of the p and n type layers form a junction. A p+ type gate area supported by the n type layer is formed either by the process of ion implantation or the process of depositing and patterning a second p type layer. The source and drain areas are heavily doped to n+ type conductivity by implanting donor ions in the n type layer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.