Semiconductor memory device which can provide required data flexibly under simplified control and operating method therefor
US5379263A · kind A · utility
42Cited by
8References
13Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Mar 23, 1993 |
| Grant date | Jan 3, 1995 |
| Priority date | — |
| Expiry date | Mar 23, 2013 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C7/1075
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
An improved video RAM having two data registers for holding data of each row in a memory cell array 1. A transfer gate circuit transfers alternately data of each row of the memory cell array 1 to the two data registers. On the other hand, since a switching circuit selects data held in the two data registers alternately and provide the same serially. In addition, length of data to be provided can be controlled externally. When a special high speed data reading such as oblique reading is required, timing control of externally applied control signals can be simplified.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.