Decompression processor for video applications
US5379356A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Apr 13, 1993 |
| Grant date | Jan 3, 1995 |
| Priority date | — |
| Expiry date | Apr 13, 2013 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04N19/70
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
A method and a structure are provided to decode intraframe and interframe coded compressed video data. In one embodiment, a decompression structure having a processor is provided with a global bus over which a decoder coprocessor, an inverse discrete cosine transform coprocessor and a motion compensation coprocessor communicate. The decompression structure communicates with a host computer over a host bus and with an external dynamic random access memory over a memory bus. The processor provides overall control to the coprocessors by reading and writing into a plurality of data and control registers, each register associated with one of the coprocessors. A structure including four of the decompression structures and a method are provided for decoding high definition television (HDTV) signals. In this structure for decoding HDTV signals, each decompression structure decodes a 480.times.1088-pixel picture area with access to up to two additional 240.times.1088-pixel picture areas.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.