Method and system for determining memory refresh rate
US5379400A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Aug 7, 1992 |
| Grant date | Jan 3, 1995 |
| Priority date | — |
| Expiry date | Aug 7, 2012 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C11/406
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A computer system is provided wherein dynamic random access memory within the system is refreshed by executing one of two refresh cycles. The computer system includes system dynamic random access memory and optional expansion dynamic random access memory which may be installed on an input/output bus. Circuitry is provided for detecting if at least one input/output device having dynamic random access memory incorporated therein is installed on the input/output bus. A refresh control unit incorporates control logic for alternatively executing (i) a first refresh cycle if no input/output device is connected to the input/output bus or (ii) a second refresh cycle if at least one of the input/output devices is connected to the input/output bus. The first refresh cycle is a faster than the second refresh cycle.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.