Fast static cross-unit comparator
US5381127A · kind A · utility
19Cited by
4References
23Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Dec 22, 1993 |
| Grant date | Jan 10, 1995 |
| Priority date | — |
| Expiry date | Dec 22, 2013 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F7/02
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A high speed, static, BiCMOS comparator circuit. Though static, the circuit operates at nearly dynamic speeds. The circuit consists of two stages. The first stage generates XOR and XNOR outputs given two bit strings. The second stage detects hit and miss separately using the XOR and XNOR inputs. The second stage generates signals for both hit lines and miss lines.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.