Binary resistor network and its use for labelling related components of digitised images in artificial vision
US5381516A · kind A · utility
Assignees
Inventors
Key dates
| Filing date | Oct 30, 1992 |
| Grant date | Jan 10, 1995 |
| Priority date | — |
| Expiry date | Oct 30, 2012 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06V10/457
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A binary resistor network is provided for the labelling of related components of binary or binary-converted images and for artificial vision comprising a plurality of peaks each joined by arches forming binary resistors. Each peak is provided with an elementary processor which enables, with the assistance of a central controller, the association of at least one associative function with each of the arches and a binary constraint with one or more peaks, thus making possible to provide for selective processing of data stored at the site of each of the elementary processors. Each arch of the network is equipped with an associative OR function and forms an accelerated Manchester chain, the establishment time of the network through application of local binary constraints thus being thus linear with the number of peaks.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.