Automated development of timing diagrams for electrical circuits
US5381524A · kind A · utility
59Cited by
11References
42Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Nov 12, 1991 |
| Grant date | Jan 10, 1995 |
| Priority date | — |
| Expiry date | Nov 12, 2011 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F30/3312
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A computer-implemented method and apparatus that automates the entry, modification, and verification of timing diagrams for electrical circuits. The computer-implemented method and apparatus also provides an automated mechanism for analyzing these timing diagrams and verifying that the timing relationships specified for the circuit are met using the parts selected for the circuit.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.