Reload-timer/counter circuit
US5383230A · kind A · utility
6Cited by
10References
27Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Aug 9, 1993 |
| Grant date | Jan 17, 1995 |
| Priority date | — |
| Expiry date | Aug 9, 2013 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F15/7842
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A reload-timer/counter circuit provides a reload-timer function and a counter function commonly and selectively. The circuit is comprised of first, second, third, and fourth registers. The third and fourth registers act as a control status register and a mode register, respectively. The first and second registers act as, in the reload-timer mode a data register and a counter register, respectively, while in the counter mode, the first and second registers act as the counter registers.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.