Method of manufacturing a semiconductor device comprising an insulated gate field effect device

US5387528A · kind A · utility

Assignee

• U.S. Philips Corporation · US

Inventors

• Keith Hutchings · San Jose, US
• Andrew L. Goodyear · Thornbury, GB
• Andrew Mark Warwick · Stockport, GB

Key dates

• Filing date: Jul 22, 1993
• Grant date: Feb 7, 1995
• Expiry date: Jul 22, 2013

Classification

• Technology area (CPC Y): Emerging Cross-Sectional Technologies
• CPC primary: Y10S148/126

Abstract

A semiconductor body (3) has a first region (4) of one conductivity type adjacent one major surface (5). A first masking layer (6) comprising at least one first mask window (6a) spaced from a second mask window (6b) is defined on the surface (5). Opposite conductivity type impurities are then introduced through the first masking layer (6) and a second masking layer (8) which is selectively removable with respect to the first masking layer (6) is subsequently provided on the first masking layer and patterned to leave a mask area (8a) covering the first mask window (6a). The semiconductor body (3) is then etched through the second mask window (6b) to define a recess (9) extending into the first region (4) while leaving the introduced impurities beneath the masked first mask window (6a) to form a relatively highly doped second region (7). The first and second masking layers (6 and 8) are removed and an insulated gate structure (10) is provided by defining a gate insulating layer (10a) on the recess walls (9a) and providing a gate conductive region (10b) on the insulating layer (10a). A relatively lowly doped third region (11) of the opposite conductivity type is provided to extend bet…