Flash memory mass storage architecture
US5388083A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Mar 26, 1993 |
| Grant date | Feb 7, 1995 |
| Priority date | — |
| Expiry date | Mar 26, 2013 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F3/0664
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A semiconductor mass storage system and architecture can be substituted for a rotating hard disk. The system and architecture avoid an erase cycle each time information stored in the mass storage is changed. (The erase cycle is understood to include, fully programming the block to be erased, and then erasing the block.) Erase cycles are avoided by programming an altered data file into an empty mass storage block rather than over itself as hard disk would. Periodically, the mass storage will need to be cleaned up. Secondly, all blocks in the mass storage are used evenly. These advantages are achieved through the use of several flags, a map to correlate a logical address of a block to a physical address of that block and a count register for each block. In particular, flags are provided for defective blocks, used blocks, old version of a block, a count to determine the number of times a block has been erased and written and erase inhibit flag.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.