Gerbil wheel memory
US5388208A · kind A · utility
54Cited by
7References
27Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Dec 4, 1992 |
| Grant date | Feb 7, 1995 |
| Priority date | — |
| Expiry date | Dec 4, 2012 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG09G5/399
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
A display memory system consisting of a controller and a display memory that has a read display memory cycle time that is a non-integer multiple of the write display memory update rate. The display memory being partitioned into two frames of display memory with each frame having a plurality of subframes. The controller consisting of a read display memory decoder, a read display memory next subframe generator a read display memory latch and consisting of a write display memory decoder, a write display memory next subframe generator and write display memory latch.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.