Arithmetic and logic processor and operating method therefor
US5388235A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Aug 16, 1993 |
| Grant date | Feb 7, 1995 |
| Priority date | — |
| Expiry date | Aug 16, 2013 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F9/4484
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
An arithmetic and logic processor includes a register file structure wherein each procedure to be processed has assigned thereto a predetermined number of registers referred to as register window. The processor further includes circuitry for comparing a predetermined constant LENGTH with the difference between the register window currently utilized by a procedure under execution and the base address of the register file, and circuitry responsive to the comparing circuitry output to detect when data should be transferred on a window basis to or from the register file from or to a stack memory for saving the register file contents, and circuitry responsive to the decision circuitry output to perform data transfer between the register file and the stack memory. According to such circuitry, overflow and underflow of the register file can be greatly suppressed to improve processing speed of the processor.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.