Circuit arrangement for operating a computer having a readback device for feeding back last-written information to the computer
US5392440A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | May 4, 1992 |
| Grant date | Feb 21, 1995 |
| Priority date | — |
| Expiry date | May 4, 2012 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F12/0638
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A circuit arrangement for operating a computer, having at least one working register into which and out of which information, under specific addresses, can be read, and a readback device for a feedback occurring in a program step whereby the last-written information is fed back to a processor of the computer. The circuit arrangement includes at least one feedback register to which the working register is assigned. A device is provided for writing the respective information under the same address both to the working register and also to the feedback register for storage therein and for writing new information. A device forwards the information stored in the feedback register to the processor.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.