Package structure for semiconductor devices and method of manufacturing the same
US5394011A · kind A · utility
66Cited by
3References
6Claims
0Family size
Assignees
Inventors
Key dates
| Filing date | Jul 6, 1993 |
| Grant date | Feb 28, 1995 |
| Priority date | — |
| Expiry date | Jul 6, 2013 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/3025
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A package structure in which conductive layers are provided on the lower surface of a circuit substrate provided with a semiconductor element mounted on the upper surface thereof, which conductive layers are connected to a conductive seal portion via conductive through holes, whereby both satisfactory air-tightness and satisfactory electromagnetic shielding characteristics of the package structure can be obtained. Projections consisting of high-temperature solder are formed as externally connecting electrodes, whereby a surface packaging operation can be carried out smoothly.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.