Stabilization of MOS-FET type voltage to current converters
US5394025A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | May 28, 1993 |
| Grant date | Feb 28, 1995 |
| Priority date | — |
| Expiry date | May 28, 2013 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG01R31/40
- WIPO fieldMeasurement
- WIPO sectorInstruments
Abstract
An electric power dissipation system operates as an active load for power supply testing. The system has a closed loop voltage to current converter with a first and second load terminal. A capacitance is connected across the first and second load terminals. A power supply having a first and second output terminal is coupled to the first and second load terminals via test conductors which have a first and second inductance respectively. A correction signal generator is provided to be responsive to the power supply. The correction signal generator provides an output signal as a function of the voltage generated across one of the inductances. A summing circuit responds to the output signal of the correction signal generator and also responds to a command signal. The output of the summing circuit controls the current flow of the current converter.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.