Programmable logic array having programmable output driver drive capacity
US5394034A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Jul 27, 1993 |
| Grant date | Feb 28, 1995 |
| Priority date | — |
| Expiry date | Jul 27, 2013 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K19/1733
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A programmable logic array includes configurable logic cells disposed in lines and columns. Each of the logic cells has signal inputs, control inputs, at least one signal output, and an output driver circuit connected upstream of the at least one signal output. The output driver circuit has a terminal for a first and a second supply potential and is connected to at least one of the control inputs. The output driver circuit is controllable for setting its driver capacity to a level other than zero, corresponding to a signal value, by a digital signal applied to the at least one control input. Conductor tracks and switching elements for interconnecting the conductor tracks connect the at least one signal output of each of the logic cells to at least one of the signal inputs of at least another one of the logic cells.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.