Method and apparatus for adaptive chip trim adjustment
US5396130A · kind A · utility
11Cited by
17References
14Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jun 29, 1993 |
| Grant date | Mar 7, 1995 |
| Priority date | — |
| Expiry date | Jun 29, 2013 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K17/693
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A method and apparatus are provided for adaptive chip trim adjustment for an integrated circuit. A plurality of switching devices have an unswitched state and a switched state. The unswitched state corresponds to one binary value, and the switched state corresponds to another binary value. A first trim word is provided by sensing the switching devices. The switching devices are temporarily bypassed, and an override bit pattern is supplied to simulate any desired pattern of the switching device states. The override bit pattern is used for simulating a switched or unswitched state for each of the plurality of switching devices.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.