Digital to analog converter
US5396245A · kind A · utility
122Cited by
6References
56Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Jan 21, 1993 |
| Grant date | Mar 7, 1995 |
| Priority date | — |
| Expiry date | Jan 21, 2013 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03M1/765
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A segmented DAC is described in which the outputs of a pair of subword DAC circuits are summed by modulating the offset voltage of a differential buffer amplifier. Also described are various alternative DAC embodiments and an operational amplifier input stage in which modulation of the offset voltage of a differential amplifier responsive to a digital signal is accomplished using interpolation techniques for eliminating errors in linearity and monotonicity arising from component inaccuracies.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.