Phase control circuit for controlling phase of video signal and sampling clock signal
US5396295A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Aug 31, 1993 |
| Grant date | Mar 7, 1995 |
| Priority date | — |
| Expiry date | Aug 31, 2013 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04N3/127
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
A phase control circuit, which can be operated easily, automatically controls the phase of a video signal and a sampling clock signal. A delay circuit (24) outputs delayed clock pulses (DP) that are out of phase with each other, and switching circuits (25a.about.25c) select one, at a time, of the delayed clock pulses (DP) that are out of phase with each other in response to respective switching signals (SS1.about.SS3) from a control circuit (23), Counters (28a.about.28c) count pixel data (ED) latched by data latch circuits (26a.about.26c) each time the delayed clock pulses (DP) are outputted by the corresponding switching circuits (25a.about.25c), The control circuit (23) confirms the counts of the counters in each frame period, and controls a switching circuit (25d) to select a clock pulse in phase with the delayed clock pulse (DP) from the switching circuit (25b) and output the selected clock pulse to a panel display unit all the counts are equal to or greater than the count of the counter (28b) first sampling screen pattern.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.