Register file backup queue
US5398330A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Mar 5, 1992 |
| Grant date | Mar 14, 1995 |
| Priority date | — |
| Expiry date | Mar 5, 2012 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F9/3863
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A register file backup system for use with a computer which processes instructions to generate results which thereby change the visual state of the computer. The computer has a register file with a plurality of addressable locations for storing data. The backup system is adapted to return the visual state of the computer to a previous state if an instruction generates an exception. The backup system utilizes less overhead so as to provide easier register file backup than a comparable software or hardware device. The backup system comprises a first-in-first-out (FIFO) queue for sequentially storing in program order, address information corresponding to destination locations in the register file where instruction results are to be stored. The FIFO queue has first and second outputs for transferring the address information stored therein: the first output being coupled to the register file for transferring a first portion of the address information to the-register file, and the second output is used for transferring a second portion of address information for backup storage of the register file contents. The backup system also has a last-in-first-out (FIFO) queue coupled to (1) the se…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.