Simulator for conducting timing analysis of a circuit
US5400270A · kind A · utility
15Cited by
6References
20Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Aug 24, 1992 |
| Grant date | Mar 21, 1995 |
| Priority date | — |
| Expiry date | Aug 24, 2012 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG01R31/318307
- WIPO fieldMeasurement
- WIPO sectorInstruments
Abstract
There is disclosed a simulator having timing error detecting from input and output signal level changes. Different timing error verifications are carried out for respective elements. In similar constructions, different test rule error verifications are also carried out for the respective elements as a function of the contents of a test rule check value definition file.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.