Circuit with diode-protected emitter resistors
US5401995A · kind A · utility
2Cited by
9References
36Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jul 30, 1993 |
| Grant date | Mar 28, 1995 |
| Priority date | — |
| Expiry date | Jul 30, 2013 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03F1/3211
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
An operational amplifier, of a type which comprises a differential cell transconductor input stage (2) incorporating a current mirror (5) provided with a pair of degenerative resistors (R9,R10) and a gain stage (7), driven directly by a transistor (Q12) of said mirror (5), has each degenerative resistor (R9,R10) formed within an epitaxial well wherewith a parasitic diode (D1,D2) is associated. Each diode (D1,D2) is connected in parallel with its corresponding resistor (R9,R10) to prevent the transistor (Q12) which drives the gain stage (7) from becoming saturated.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.