Bare die carrier
US5402077A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Nov 20, 1992 |
| Grant date | Mar 28, 1995 |
| Priority date | — |
| Expiry date | Nov 20, 2012 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/14
- WIPO fieldMeasurement
- WIPO sectorInstruments
Abstract
An integrated circuit carrier comprising: a substrate defining an opening and an outer perimeter; a multiplicity of I/O pads disposed about the perimeter; an interconnect circuit which includes a composite of a multiplicity of individual electrical conductors which are formed in a polymer dielectric; wherein the interconnect circuit overlays a top surface of the substrate and extends across the opening so as to span the opening; a multiplicity of die contact pads connected to the conductors are disposed about the flexible polymer dielectric with particles deposited on the die contact pads; a polymer dielectric fence upstanding from the membrane and sized to receive an integrated circuit; a top cap that rests upon the integrated circuit when the integrated circuit is received within the fence; a bottom cap that rests against a bottom surface of the substrate; and a fastener for securing the top cap to the bottom cap with the integrated circuit disposed therebetween.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.