Method and apparatus for digital to analog conversion using gaas HI.sup.2 L
US5402126A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Apr 30, 1993 |
| Grant date | Mar 28, 1995 |
| Priority date | — |
| Expiry date | Apr 30, 2013 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03M1/785
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A method and apparatus is provided for accurate digital to analog conversion in which bipolar voltage switches are used in a GaAs I.sup.2 L integrated circuit. An architecture is provided that includes an R-2R resistor ladder network formed in a GaAs I.sup.2 L integrated circuit. A compound transistor pair (Q1, Q2) is connected to each leg (2R) of the ladder network in a digital to analog converter (110). Each transistor pair (Q1, Q2) is configured as a single-pole-double-throw voltage bit switch (100). The transistor pair switches the shunt (2R) resistors between two, alternative voltage levels (Vb, circuit "ground"), based on the state of the binary input logic signal (Ai). Each switch and respective leg in the ladder network relates to a corresponding bit position (Ai) in the input signal. A matched pair of diodes (D2, D3) are used to clamp the voltages to be selected by the bit switch (100) to a predetermined voltage level, thus regulating the voltages switched out to the ladder network and increasing the switching speed of the converter.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.