Method and apparatus for digital multiplication based on sums and differences of finite sets of powers of two
US5402369A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Jul 6, 1993 |
| Grant date | Mar 28, 1995 |
| Priority date | — |
| Expiry date | Jul 6, 2013 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F7/5334
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method and apparatus is disclosed for digital multiplication based on sums and differences of finite sets of powers of two. It is observed that for a given multiplicand signal A, multiples of the form A.multidot.P/Q can be defined by adding or subtracting term signals when each term signal (T.sub.i,T.sub.j) is selectively made representative either of the multiplicand (A) multiplied by a power of two (T=A*2.sup.-i) or representative of a nullity (T=0*A). A mapping unit is provided for controlling responsive barrel shifters and for controlling one or more responsive adder/subtractor units so that the resultant system has a transfer function equivalent to that of an n-bits by m-bits multiplier.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.