Non-volatile semiconductor memory device and memory circuit using the same
US5402374A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Apr 29, 1994 |
| Grant date | Mar 28, 1995 |
| Priority date | — |
| Expiry date | Apr 29, 2014 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D64/511
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
In the non-volatile semiconductor memory device according to the present invention, a floating gate is provided on a channel region which is interposed between a source region and a drain region through a tunnel insulation film. The tunnel insulation film and the floating gate are formed spaced apart from the source region by a predetermined offset distance. A sidewall gate which is insulated from the channel region and the floating gate is provided in an offset distance portion on the channel region. An offset region immediately under the sidewall gate functions as an inversion layer, thereby to make it possible to read out information at high speed utilizing the inversion of the offset region.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.