Process for through-hole plating of two-layer circuit boards and multilayers
US5403467A · kind A · utility
57Cited by
1References
5Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jan 19, 1993 |
| Grant date | Apr 4, 1995 |
| Priority date | — |
| Expiry date | Jan 19, 2013 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH05K2203/0796
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
A process for through-hole plating of two-layer circuit boards and multilayers using polythiophenes as a conductive agent on the side walls of through-holes for the direct through-hole plating and to the circuit boards and multilayers thus produced.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.