Single-to-differential converter
US5404050A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Dec 9, 1993 |
| Grant date | Apr 4, 1995 |
| Priority date | — |
| Expiry date | Dec 9, 2013 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03F3/265
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A single-to-differential converter for generating two balanced output signals from one single-ended input signal includes first (3) and second (6) output terminals for providing the balanced output signal, a first transistor (M1) having a control electrode coupled to an input terminal (4) for receiving the input signal, a first main electrode coupled to a supply voltage terminal (1) for receiving a supply voltage and a second main electrode coupled to the first output terminal (3). A second transistor (M2) is provided having a control electrode coupled to a bias voltage terminal (5), a first main electrode coupled to the control electrode of the first transistor (M1) and a second main electrode connected to the second output terminal (6). A diode-connected third transistor (M3) is provided having its main current path coupled to the first output terminal (3), and a diode-connected fourth transistor (M4) is provided having its main current path connected to the second output terminal (6). The resulting single-to-differential converter provides low distortion and good balance at high frequencies.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.