Test mode readback in a memory display interface
US5404318A · kind A · utility
12Cited by
5References
22Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Dec 1, 1992 |
| Grant date | Apr 4, 1995 |
| Priority date | — |
| Expiry date | Dec 1, 2012 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG09G5/39
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
A test mode read back function for verifying the functions of the memory display interface and a VRAM frame buffer coupled to the memory display interface, wherein the memory display interface implements programmable pixel rates and pixel depths, and programmable pixel processing functions.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.