Time division multiplexer chip for supporting alternating communication between a pair of RAMs and two different interfaces
US5404455A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Dec 31, 1991 |
| Grant date | Apr 4, 1995 |
| Priority date | — |
| Expiry date | Dec 31, 2011 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04M3/533
- WIPO fieldTelecommunications
- WIPO sectorElectrical engineering
Abstract
A time division multiplexer (TDM) chip having particular application in a digital voice processing system wherein voice processing functions are run in software. The TDM chip has a pair of RAMs which are in communication with a bus and at least one interface that provides communication with other devices. An bank switch controls the RAMs so that their communication with the bus and the interface alternates, i.e. while the first RAM is in communication with the interface the other RAM is in communication with the bus. After a determined period the communications are reversed. This scheme provides faster processing and more efficient use of the components. Including is a provision for allowing multiple interfaces to communicate with the RAM alternatively in a time shared manner.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.